CWE-1262: Improper Access Control for Register Interface
CWE版本: 4.18
更新日期: 2025-09-09
弱点描述
The product uses memory-mapped I/O registers that act as an interface to hardware functionality from software, but there is improper access control to those registers.
常见后果
影响范围: Confidentiality Integrity
技术影响: Read Memory Read Application Data Modify Memory Modify Application Data Gain Privileges or Assume Identity Bypass Protection Mechanism Unexpected State Alter Execution Logic
说明: Confidentiality of hardware assets may be violated if the protected information can be read out by software through the register interface. Registers storing security state, settings, other security-critical data may be corruptible by software without correctly implemented protections.
潜在缓解措施
阶段: Architecture and Design
描述: Design proper policies for hardware register access from software.
阶段: Implementation
描述: Ensure that access control policies for register access are implemented in accordance with the specified design.
检测方法
方法: Manual Analysis
This is applicable in the Architecture phase before implementation started. Make sure access policy is specified for the entire memory map. Manual analysis may not ensure the implementation is correct.
有效性: Moderate
方法: Manual Analysis
Registers controlling hardware should have access control implemented. This access control may be checked manually for correct implementation. Items to check consist of how are trusted parties set, how are trusted parties verified, how are accesses verified, etc. Effectiveness of a manual analysis will vary depending upon how complicated the interface is constructed.
有效性: Moderate
方法: Simulation / Emulation
Functional simulation is applicable during the Implementation Phase. Testcases must be created and executed for memory mapped registers to verify adherence to the access control policy. This method can be effective, since functional verification needs to be performed on the design, and verification for this weakness will be included. There can be difficulty covering the entire memory space during the test.
有效性: Moderate
方法: Formal Verification
Formal verification is applicable during the Implementation phase. Assertions need to be created in order to capture illegal register access scenarios and prove that they cannot occur. Formal methods are exhaustive and can be very effective, but creating the cases for large designs may be complex and difficult.
有效性: High
方法: Automated Analysis
Information flow tracking can be applicable during the Implementation phase. Security sensitive data (assets) - for example, as stored in registers - is automatically tracked over time through the design to verify the data doesn't reach illegal destinations that violate the access policies for the memory map. This method can be very effective when used together with simulation and emulation, since detecting violations doesn't rely on specific scenarios or data values. This method does rely on simulation and emulation, so testcases must exist in order to use this method.
有效性: High
方法: Architecture or Design Review
Manual documentation review of the system memory map, register specification, and permissions associated with accessing security-relevant functionality exposed via memory-mapped registers.
有效性: Moderate
方法: Fuzzing
Perform penetration testing (either manual or semi-automated with fuzzing) to verify that access control mechanisms such as the memory protection units or on-chip bus firewall settings adequately protect critical hardware registers from software access.
有效性: Moderate
观察示例
参考: CVE-2014-2915
virtualization product does not restrict access to debug and other processor registers in the hardware, allowing a crash of the host or guest OS
参考: CVE-2021-3011
virtual interrupt controller in a virtualization product allows crash of host by writing a certain invalid value to a register, which triggers a fatal error instead of returning an error code
参考: CVE-2020-12446
Driver exposes access to Model Specific Register (MSR) registers, allowing admin privileges.
参考: CVE-2015-2150
Virtualization product does not restrict access to PCI command registers, allowing host crash from the guest.
引入模式
| 阶段 | 说明 |
|---|---|
| Architecture and Design | This weakness may be exploited if the register interface design does not adequately protect hardware assets from software. |
| Implementation | Mis-implementation of access control policies may inadvertently allow access to hardware assets through the register interface. |