CWE-1315: Improper Setting of Bus Controlling Capability in Fabric End-point
CWE版本: 4.18
更新日期: 2025-09-09
弱点描述
The bus controller enables bits in the fabric end-point to allow responder devices to control transactions on the fabric.
常见后果
影响范围: Access Control
技术影响: Modify Memory Read Memory Bypass Protection Mechanism
潜在缓解措施
阶段: Architecture and Design
描述: For responder devices, the register bit in the fabric end-point that enables the bus controlling capability must be set to 0 by default. This bit should not be set during secure-boot flows. Also, writes to this register must be access-protected to prevent malicious modifications to obtain bus-controlling capability.
阶段: Implementation
描述: For responder devices, the register bit in the fabric end-point that enables the bus controlling capability must be set to 0 by default. This bit should not be set during secure-boot flows. Also, writes to this register must be access-protected to prevent malicious modifications to obtain bus-controlling capability.
阶段: System Configuration
描述: For responder devices, the register bit in the fabric end-point that enables the bus controlling capability must be set to 0 by default. This bit should not be set during secure-boot flows. Also, writes to this register must be access-protected to prevent malicious modifications to obtain bus-controlling capability.
引入模式
| 阶段 | 说明 |
|---|---|
| Architecture and Design | - |
| Implementation | - |
| System Configuration | - |